~mpu/qbe

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Looking for guides on implementing a new target

Atirut Wattanamongkol <atirut.wattanamongkol@gmail.com>
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Hi all,

I’ve been working on a C compiler that targets the Z80 and integrates
with the Binutils toolchain (mostly because there aren’t any Z80 C
compilers that do this). My compiler uses LLVM IR internally since it
seemed like a good choice at first, but I’ve run into some issues with
register allocation and translating the IR to assembly (basically, the
backend stuff).

I found out about this backend through a tutorial on writing a C
compiler. It looked really interesting since it’s way less complicated
than the whole LLVM backend setup. The problem is, I haven’t been able
to find a guide or much info on how to implement a new QBE target.

Any pointers?
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There aren't any; you'll have to read the code and see how it's
done for other backends.

Quoth Atirut Wattanamongkol <atirut.wattanamongkol@gmail.com>:
> Hi all,
> 
> I’ve been working on a C compiler that targets the Z80 and integrates
> with the Binutils toolchain (mostly because there aren’t any Z80 C
> compilers that do this). My compiler uses LLVM IR internally since it
> seemed like a good choice at first, but I’ve run into some issues with
> register allocation and translating the IR to assembly (basically, the
> backend stuff).
> 
> I found out about this backend through a tutorial on writing a C
> compiler. It looked really interesting since it’s way less complicated
> than the whole LLVM backend setup. The problem is, I haven’t been able
> to find a guide or much info on how to implement a new QBE target.
> 
> Any pointers?
> 
Roberto E. Vargas Caballero <k0ga@shike2.com>
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Hi,

On Fri, Dec 06, 2024 at 10:49:25PM +0700, Atirut Wattanamongkol wrote:
> Hi all,
> 
> I’ve been working on a C compiler that targets the Z80 and integrates
> with the Binutils toolchain (mostly because there aren’t any Z80 C
> compilers that do this). My compiler uses LLVM IR internally since it
> seemed like a good choice at first, but I’ve run into some issues with
> register allocation and translating the IR to assembly (basically, the
> backend stuff).

This is basically what I am doing xD Sadly, the support for z80 is minimal,
but the support for coff (the binutils use coff for z80) is very advanced.
If you want you can take a look to https://www.simple-cc.org.

> I found out about this backend through a tutorial on writing a C
> compiler. It looked really interesting since it’s way less complicated
> than the whole LLVM backend setup. The problem is, I haven’t been able
> to find a guide or much info on how to implement a new QBE target.
> 
> Any pointers?

The main issue is that qbe is targetted mainly for 64 architectures, in fact there
are some people trying to support 32 bits for 386, but I am not sure how easy can be
to target a 8 bit architecture.

Regards,
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Hi Atirut

On Sat, Dec 7, 2024 at 5:43 PM Atirut Wattanamongkol
<atirut.wattanamongkol@gmail.com> wrote:

> I’ve been working on a C compiler that targets the Z80

Cool! Why? I was very familiar with the z80[a] about 50 years ago via
the amazing Sinclair ZX80/1 and Spectrum products.

> [QBE]
> Any pointers?

Roberto E. Vargas Caballero <k0ga@shike2.com> wrote:

> The main issue is that qbe is targetted mainly for 64 architectures, in fact there
> are some people trying to support 32 bits for 386, but I am not sure how easy can be
> to target a 8 bit architecture.

To be fair, QBE is targeted at 32 and 64-bit architectures, although
there are no 32-bit architectures supported. QBE IL load/store memory
ops in QBE can (allegedly) happily accept 32-bit ("w") memory
addresses.

8-bit architectures (or really 16-bit like z80) seems trickier in QBE.
I wonder if it would just work to use "w" (32-bit) everywhere, as for
32-bit architectures, and ignore the difference with the actual arch?

Register allocation in QBE is not well-suited for "split" registers
like z80 h/l, b/c, d/e. It assumes a single register, even on x86
which has similar "split" 8-bit registers. That seems ok functionally,
except you get register a, plus 3 more registers (l, c, e?) rather
than 6 so register pressure will be bad.

Unfortunately the QBE arch-specific (backend) is my least familiar
territory, but please contact me privately if you have more specific
questions. Once apon a time I was fairly familiar with z80.

Kind regards
R
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On Sat, Dec 7, 2024 at 6:11 PM Roland Paterson-Jones <rolandpj@gmail.com> wrote:

> I wonder if it would just work to use "w" (32-bit) everywhere

Hrmm, this boils down to assuming a 16-bit arch, which precludes the
use of z80 "a" register completely - except for necessary use in
load/store.

That definitely seems like a bad fit :(
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