~mpu/qbe

rv64: implement Oswap for floating-point types v3 APPLIED

Alexey Yerin: 1
 rv64: implement Oswap for floating-point types

 4 files changed, 8 insertions(+), 9 deletions(-)
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[PATCH v3] rv64: implement Oswap for floating-point types Export this patch

---
v2 -> v3:
* Entirely drop nlv[0..1] check
* Fix typo in targ.c
 live.c      | 4 +---
 rv64/all.h  | 2 +-
 rv64/emit.c | 3 ++-
 rv64/targ.c | 8 ++++----
 4 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/live.c b/live.c
index a1b4219..a646b4a 100644
--- a/live.c
+++ b/live.c
@@ -73,9 +73,7 @@ Again:
		for (t=0; bsiter(b->in, &t); t++)
			nlv[KBASE(f->tmp[t].cls)]++;
		if (rtype(b->jmp.arg) == RCall) {
			assert((int)bscount(b->in) == T.nrglob &&
				nlv[0] == T.nrglob &&
				nlv[1] == 0);
			assert((int)bscount(b->in) == T.nrglob);
			b->in->t[0] |= T.retregs(b->jmp.arg, nlv);
		} else
			bset(b->jmp.arg, b, nlv, f->tmp);
diff --git a/rv64/all.h b/rv64/all.h
index eb2daa9..461f52b 100644
--- a/rv64/all.h
+++ b/rv64/all.h
@@ -23,7 +23,7 @@ enum Rv64Reg {
	NFPR = FS11 - FT0 + 1,
	NGPR = T6 - T0 + 1,
	NGPS = A7 - T0 + 1,
	NFPS = FA7 - FT0 + 1,
	NFPS = FA7 - FT0 + 1 - 1, /* - FT11 */
	NCLR = (S11 - S1 + 1) + (FS11 - FS0 + 1),
};
MAKESURE(reg_not_tmp, FS11 < (int)Tmp0);
diff --git a/rv64/emit.c b/rv64/emit.c
index 841c555..5bade6b 100644
--- a/rv64/emit.c
+++ b/rv64/emit.c
@@ -89,6 +89,7 @@ static struct {
	{ Ocopy,   Ki, "mv %=, %0" },
	{ Ocopy,   Ka, "fmv.%k %=, %0" },
	{ Oswap,   Ki, "mv %?, %0\n\tmv %0, %1\n\tmv %1, %?" },
	{ Oswap,   Ka, "fmv.%k %?, %0\n\tfmv.%k %0, %1\n\tfmv.%k %1, %?" },
	{ Oreqz,   Ki, "seqz %=, %0" },
	{ Ornez,   Ki, "snez %=, %0" },
	{ Ocall,   Kw, "jalr %0" },
@@ -162,7 +163,7 @@ emitf(char *s, Ins *i, Fn *fn, FILE *f)
			if (KBASE(k) == 0)
				fputs("t6", f);
			else
				abort();
				fputs("ft11", f);
			break;
		case 'k':
			if (i->cls != Kl)
diff --git a/rv64/targ.c b/rv64/targ.c
index d42d0a1..5dfa503 100644
--- a/rv64/targ.c
+++ b/rv64/targ.c
@@ -11,7 +11,7 @@ int rv64_rsave[] = {
	A0, A1, A2, A3, A4, A5, A6, A7,
	FA0, FA1, FA2,  FA3,  FA4, FA5, FA6, FA7,
	FT0, FT1, FT2,  FT3,  FT4, FT5, FT6, FT7,
	FT8, FT9, FT10, FT11,
	FT8, FT9, FT10,
	-1
};
int rv64_rclob[] = {
@@ -22,8 +22,8 @@ int rv64_rclob[] = {
	-1
};

/* T6 used as swap register (TODO: is there a better choice?) */
#define RGLOB (BIT(FP) | BIT(SP) | BIT(GP) | BIT(TP) | BIT(RA) | BIT(T6))
/* T6 and FT11 are used as swap registers (TODO: is there a better choice?) */
#define RGLOB (BIT(FP) | BIT(SP) | BIT(GP) | BIT(TP) | BIT(RA) | BIT(T6) | BIT(FT11))

static int
rv64_memargs(int op)
@@ -39,7 +39,7 @@ Target T_rv64 = {
	.fpr0 = FT0,
	.nfpr = NFPR,
	.rglob = RGLOB,
	.nrglob = 6,
	.nrglob = 7,
	.rsave = rv64_rsave,
	.nrsave = {NGPS, NFPS},
	.retregs = rv64_retregs,
-- 
2.36.1